Transistors §

• B: Base ⇒ A swtich connecting C to E
  • open (C is disconnected from E) when supplied 0v
  • closed (C is connected to E) by applying +5V
• C: Collector
• E: Emitter

Possible to create NAND gate using just transistors ∴ possible to create all logic gates using only transistors [^3]

[^3] : They dont actually do it this way (see lab)